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 DBV 5
DBV 6
YEQ
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TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA LOW-DROPOUT LINEAR REGULATORS IN NanoStarTM WAFER CHIP SCALE AND SOT23
FEATURES
* * * * * * * * * 200-mA RF Low-Dropout Regulator With Enable Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V, 3.3-V, 4.75-V, and Adjustable (1.22-V to 5.5-V) High PSRR (70 dB at 10 kHz) Ultralow-Noise (32 VRMS, TPS79328) Fast Start-Up Time (50 s) Stable With a 2.2-F Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage (112 mV at Full Load, TPS79330) 5- and 6-Pin SOT23 (DBV) and NanoStar Wafer Chip Scale (YEQ) Packages
DESCRIPTION
The TPS793xx family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow-noise, fast start-up, and excellent line and load transient responses in NanoStar wafer chip scale and SOT23 packages. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small 2.2-F ceramic capacitor on the output. The TPS793xx family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (e.g., 112 mV at 200 mA, TPS79330). Each device achieves fast start-up times (approximately 50 s with a 0.001-F bypass capacitor) while consuming very low quiescent current (170 A typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 A. The TPS79328 exhibits approximately 32 VRMS of output voltage noise at 2.8-V output with a 0.1-F bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time.
TPS79328
APPLICATIONS
* * * * * RF: VCOs, Receivers, ADCs Audio Cellular and Cordless Telephones BluetoothTM, Wireless LAN Handheld Organizers, PDAs
DBV PACKAGE (TOP VIEW)
TPS79328
IN GND EN 1 2 3 4 NR 5 OUT
0.30 Output Spectral Noise Density (V/Hz)
OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
100 VIN = 3.8 V COUT = 2.2 F CNR = 0.1 F Ripple Rejection (dB) 90 80 70 60 50 40 30 20 10 0 100 1k 10 k Frequency (Hz) 100 k 0 10
RIPPLE REJECTION vs FREQUENCY
IOUT = 200 mA
Fixed Option DBV PACKAGE (TOP VIEW) IN GND EN 1 2 3 6 5 4 OUT FB NR
0.25 0.20
0.15 IOUT = 1 mA 0.10 IOUT = 200 mA 0.05
IOUT = 10 mA
Adjustable Option YEQ PACKAGE (TOP VIEW) IN
C3 A3 C1 B2 A1
VIN = 3.8 V COUT = 10 F CNR = 0.01 F 100 1k 10 k 100 k 1M 10 M
OUT NR GND
Frequency (Hz)
EN
Figure 1.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark of Bluetooth Sig, Inc. NanoStar is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2001-2004, Texas Instruments Incorporated
TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS (1) (2)
PRODUCT TPS79301 TPS79318 TPS79325 TPS79328 TPS793285 TPS79330 TPS79333 TPS793475 (1) (2) VOLTAGE 1.22 V to 5.5 V 1.8 V 2.5 V 2.8 V 2.85 V 3V 3.3 V 4.75 V PACKAGE SOT23 (DBV) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) SOT23 (DBV) -40C to +125C TJ SYMBOL PGVI PHHI E3 PGWI E4 PGXI E2 PHII E5 PGYI E6 PHUI PHJI PART NUMBER TPS79301DBVR TPS79318DBVR TPS79318YEQ TPS79325DBVR TPS79325YEQ TPS79328DBVR TPS79328YEQ TPS793285DBVR TPS793285YEQ TPS79330DBVR TPS79330YEQ TPS79333DBVR TPS793475DBVR
For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. DBVR indicates tape and reel of 3000 parts. YEQR indicates tape and reel of 3000 parts. YEQT indicates tape and reel of 250 parts.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted) (1)
UNIT VIN range VEN range VOUT range Peak output current ESD rating, HBM ESD rating, CDM Continuous total power dissipation Junction temperature range, DBV package Junction temperature range, YEQ package Storage temperature range, Tstg (1) -0.3 V to 6 V -0.3 V to VIN + 0.3 V -0.3 V to 6 V Internally limited 2 kV 500 V See Dissipation Ratings Table -40C to 150C -40C to 125C -65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
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TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
DISSIPATION RATINGS TABLE
BOARD Low-K (1) High-K (2) Low-K (1) High-K (2) (1) (2) PACKAGE DBV DBV YEQ YEQ RJC 65C/W 65C/W 27C/W 27C/W RJA 255C/W 180C/W 255C/W 190C/W DERATING FACTOR ABOVE TA = 25C 3.9 mW/C 5.6 mW/C 3.9 mW/C 5.3 mW/C TA 25C POWER RATING 390 mW 560 mW 390 mW 530 mW TA = 70C POWER RATING 215 mW 310 mW 215 mW 296 mW TA = 85C POWER RATING 155 mW 225 mW 155 mW 216 mW
The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board.
ELECTRICAL CHARACTERISTICS
over recommended operating temperature range TJ = -40 to 125C, VEN = VIN, VIN = VOUT(nom) + 1 V (1), IOUT = 1 mA, COUT = 10 F, CNR = 0.01 F (unless otherwise noted). Typical values are at 25C.
PARAMETER VIN Input voltage (1) IOUT Continuous output current VFB Internal reference (TPS79301) Output voltage range (TPS79301) TPS79318 TPS79325 TPS79328 Output voltage TPS793285 TPS79330 TPS79333 TPS793475 Line regulation (VOUT%/VIN) (1) Load regulation (VOUT%/IOUT) TPS79328 TPS793285 Dropout voltage (2) (VIN = VOUT(nom) - 0.1V) TPS79330 TPS79333 TPS793475 Output current limit GND pin current Shutdown current (3) FB pin current 0 A < IOUT < 200 mA, 0 A < IOUT < 200 mA, 0 A < IOUT < 200 mA, 0 A < IOUT < 200 mA, 0 A < IOUT < 200 mA, 0 A IOUT < 200 mA, 0 A < IOUT < 200 mA, VOUT + 1 V < VIN 5.5 V 0 A < IOUT < 200 mA, IOUT = 200 mA IOUT = 200 mA IOUT = 200 mA IOUT = 200 mA IOUT = 200 mA VOUT = 0 V 0 A < IOUT < 200 mA VEN = 0 V, 2.7 V < VIN < 5.5 V VFB = 1.8 V f = 100 Hz, TJ = 25C, Power-supply ripple rejection TPS79328 f = 100 Hz, TJ = 25C, f = 10 kHz, TJ = 25C, f = 100 kHz, TJ = 25C, BW = 200 Hz to 100 kHz, IOUT = 200 mA IOUT = 10 mA IOUT = 200 mA IOUT = 200 mA IOUT = 200 mA CNR = 0.001 F Output noise voltage (TPS79328) CNR = 0.0047 F CNR = 0.01 F CNR = 0.1 F 55 36 33 32 VRMS 70 68 70 43 dB 285 170 0.07 TJ = 25C 2.8 V < VIN < 5.5 V 3.5 V < VIN < 5.5 V 3.8 V < VIN < 5.5 V 3.85 V < VIN < 5.5 V 4 V < VIN < 5.5 V 4.3 V < VIN < 5.5 V 5.25 V < VIN < 5.5 V TEST CONDITIONS MIN 2.7 0 1.201 VFB 1.764 2.45 2.744 2.793 2.94 3.234 4.655 1.8 2.5 2.8 2.85 3 3.3 4.75 0.05 5 120 120 112 102 77 600 220 1 1 200 200 200 180 125 mA A A A mV 1.225 TYP MAX 5.5 200 1.250 5.5 - VDO 1.836 2.55 2.856 2.907 3.06 3.366 4.845 0.12 UNIT V mA V V V V V V V V V %/V mV
(1) (2) (3)
Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater. Dropout is not measured for the TPS79318 and TPS79325 since minimum VIN = 2.7 V. For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low. 3
TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
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ELECTRICAL CHARACTERISTICS (continued)
over recommended operating temperature range TJ = -40 to 125C, VEN = VIN, VIN = VOUT(nom) + 1 V, IOUT = 1 mA, COUT = 10 F, CNR = 0.01 F (unless otherwise noted). Typical values are at 25C.
PARAMETER Time, start-up (TPS79328) High level enable input voltage Low level enable input voltage EN pin current UVLO threshold UVLO hysteresis TEST CONDITIONS CNR = 0.001 F RL = 14 , COUT = 1 F 2.7 V < VIN < 5.5 V 2.7 V < VIN < 5.5 V VEN = 0 VCC rising CNR = 0.0047 F CNR = 0.01 F 1.7 0 -1 2.25 100 MIN TYP 50 70 100 VIN 0.7 1 2.65 V V A V mV s MAX UNIT
4
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TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
FUNCTIONAL BLOCK DIAGRAMS ADJUSTABLE VERSION
IN UVLO 2.45V Current Sense ILIM _ 59 k OUT
GND EN UVLO Thermal Shutdown Bandgap Reference 1.22V
SHUTDOWN + FB
R1
R2
QuickStart 250 k Vref
External to the Device NR
IN
FIXED VERSION
IN UVLO 2.45V GND EN UVLO R2 Thermal Shutdown QuickStart Bandgap Reference 1.22V 250 k Vref Current Sense ILIM _ SHUTDOWN R1 + OUT
R2 = 40 k
IN
NR
Terminal Functions
TERMINAL NAME NR EN FB GND IN OUT SOT23 ADJ 4 3 5 2 1 6 SOT23 FIXED 4 3 N/A 2 1 5 WCSP FIXED B2 A3 N/A A1 C3 C1 DESCRIPTION Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This improves power-supply rejection and reduces output noise. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. This terminal is the feedback input voltage for the adjustable device. Regulator ground Unregulated input to the device. Output of the regulator.
5
TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
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TYPICAL CHARACTERISTICS (SOT23 PACKAGE)
TPS79328 OUTPUT VOLTAGE vs OUTPUT CURRENT
2.805 2.804 2.803 2.802 VOUT (V) VOUT (V) 2.801 2.800 2.799 2.798 2.797 2.780 2.796 2.795 0 50 100 IOUT (mA) 150 200 2.775 VIN = 3.8 V COUT = 10 F -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (C) 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (C) VIN = 3.8 V COUT = 10 F TJ = 25C 2.805 2.800 IOUT = 1 mA 2.795 IGND (A) 150
TPS79328 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE
250
TPS79328 GROUND CURRENT vs JUNCTION TEMPERATURE
VIN = 3.8 V COUT = 10 F 200
IOUT = 1 mA
IOUT = 200 mA
2.790 2.785 IOUT = 200 mA
100
50
Figure 2. TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
0.30 Output Spectral Noise Density (V/Hz) VIN = 3.8 V COUT = 2.2 F CNR = 0.1 F Output Spectral Noise Density (V/Hz) 0.30
Figure 3. TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
1.6 Output Spectral Noise Density (V/Hz) VIN = 3.8 V COUT = 10 F CNR = 0.1 F 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 100
Figure 4. TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
VIN = 3.8 V IOUT = 200 mA COUT = 10 F CNR = 0.001 F CNR = 0.0047 F CNR = 0.01 F CNR = 0.1 F
0.25 0.20
0.25 0.20 0.15
0.15
IOUT = 1 mA
IOUT = 1 mA
0.10 IOUT = 200 mA 0.05
0.10 IOUT = 200 mA 0.05 0 100
0 100 1k 10 k Frequency (Hz) 100 k
1k
10 k
100 k
1k
10 k
100 k
Frequency (Hz)
Frequency (Hz)
Figure 5. ROOT MEAN SQUARE OUTPUT NOISE vs CNR
60 50 40 VOUT = 2.8 V IOUT = 200 mA COUT = 10 F 2.5
Figure 6.
Figure 7. TPS79328 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE
180 160 140 120 VDO (mV) IOUT = 200 mA VIN = 2.7 V COUT = 10 F
OUTPUT IMPEDANCE vs FREQUENCY
VIN = 3.8 V COUT = 10 F TJ = 25 C
RMS, Output Noise (VRMS)
2.0
1.5 ZO () 30 20 10 BW = 100 Hz to 100 kHz 0 0.001 0.01 CNR (F) 0.1 0 10 100 1k 10 k 100 k Frequency (Hz) 1M 10 M 0.5 IOUT = 1 mA 1.0
100 80 60 40 20 0 -40 -25 -10 5 IOUT = 10 mA
IOUT = 100 mA
20 35 50 65 80 95 110 125 TJ (C)
Figure 8.
Figure 9.
Figure 10.
6
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TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TPS79328 RIPPLE REJECTION vs FREQUENCY
100 90 80 Ripple Rejection (dB) 70 60 50 40 30 20 10 0 10 VIN = 3.8 V COUT = 10 F CNR = 0.01 F 100 1k 10 k 100 k 1M 10 M IOUT = 10 mA IOUT = 200 mA Ripple Rejection (dB) 100 90 80 70 60 50 40 30 20 10 0 10 100 1k 10 k 100 k 1M 10 M Frequency (Hz) IOUT = 10 mA VIN = 3.8 V COUT = 2.2 F CNR = 0.01 F Ripple Rejection (dB) IOUT = 200 mA
TPS79328 RIPPLE REJECTION vs FREQUENCY
100 90 80 70 60 50 40 30 20 10 0 10
TPS79328 RIPPLE REJECTION vs FREQUENCY
VIN = 3.8 V COUT = 2.2 F CNR = 0.1 F IOUT = 200 mA
IOUT = 10 mA
100
1k
10 k
100 k
1M
10 M
Frequency (Hz)
Frequency (Hz)
Figure 11. TPS79328 OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP)
4 VEN (V) 2 0 CNR = 0.001 F 3 VIN (mV) VOUT (V) 2 1 0 0 20 40 60 80 100 120 140 160 180 200 Time (s) 0 10 20 CNR = 0.0047 F CNR = 0.01 F VIN = 3.8 V VOUT = 2.8 V IOUT = 200 mA COUT = 2.2 F TJ = 25C 4.8
Figure 12.
Figure 13.
TPS79328 LINE TRANSIENT RESPONSE
20 VOUT (mV) 0 -20 -40 dv dt 0.4 V
TPS79328 LOAD TRANSIENT RESPONSE
VIN = 3.8 V COUT = 10 F
VOUT (mV)
3.8 IOUT = 200 mA COUT = 2.2 F CNR = 0.01 F
20 0 -20
s
300 IOUT (mA) 200 100 0
di dt
0.02A
s
1mA
30 40
50 60
70 80
90 100
0
50 100 150 200 250 300 350 400 450 500 Time (s)
Time (s)
Figure 14.
Figure 15.
Figure 16. TPS79301 DROPOUT VOLTAGE vs INPUT VOLTAGE
200
POWER-UP / POWER-DOWN
250 VOUT = 3 V RL = 15
DROPOUT VOLTAGE vs OUTPUT CURRENT
200 TJ = 125C
TJ = 125C 150
500 mV/div
VDO (mV)
VDO (mV)
150 TJ = 25C 100 TJ = -55C
100
TJ = 25C
VIN
VOUT 50 50 TJ = -40C IOUT = 200 mA 0 1s/div 0 20 40 60 80 100 120 140 160 180 200 IOUT (mA) 0 2.5 3.0 3.5 VIN (V) 4.0 4.5 5.0
Figure 17.
Figure 18.
Figure 19.
7
TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
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TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT
100 ESR, Equivalent Series Resistance () ESR, Equivalent Series Resistance () COUT = 2.2 F VIN = 5.5 V, VOUT 1.5 V TJ = -40C to 125C Region of Instability
TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT
100 COUT = 10 F VIN = 5.5 V TJ = -40C to 125C Region of Instability
10
10
1
1
0.1 Region of Stability 0.01 0 0.02 0.04 0.06 0.08 0.20 IOUT (A)
0.1 Region of Stability
0.01 0 0.02 0.04 0.06 0.08 0.20 IOUT (A)
Figure 20.
Figure 21.
8
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TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
APPLICATION INFORMATION
The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current (170 A typically), and enable-input to reduce supply currents to less than 1 A when the regulator is turned off. A typical application circuit is shown in Figure 22.
VIN
VIN
IN TPS793xx 0.1F EN GND
OUT
VOUT
NR
VOUT
2.2F 0.01F
Figure 22. Typical Application Circuit
External Capacitor Requirements
A 0.1-F or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS793xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device is located several inches from the power source. Like most low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 2.2 F. Any 2.2-F or larger ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load current is not expected to exceed 100 mA, a 1.0-F ceramic capacitor can be used. The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has an NR pin which is connected to the voltage reference through a 250-k internal resistor. The 250-k internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1-F to ensure that it is fully charged during the quickstart time provided by the internal switch shown in the Functional Block Diagrams As an example, the TPS79328 exhibits only 32 VRMS of output voltage noise using a 0.1-F ceramic bypass capacitor and a 2.2-F ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at the NR pin that is created by the internal 250-k resistor and external capacitor.
Board Layout Recommendation to Improve PSRR and Noise Performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device.
9
TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
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APPLICATION INFORMATION (continued) Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125C; the maximum junction temperature should be restricted to 125C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum power dissipation limit is determined using Equation 1: T max T A P D(max) ) J R QJA Where:
* * * TJmax is the maximum allowable junction temperature. RJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table). TA is the ambient temperature.
(1)
The regulator dissipation is calculated using Equation 2: PD VIN)V OUT I OUT
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection circuit.
Programming the TPS79301 Adjustable LDO Regulator
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as shown in Figure 23. The output voltage is calculated using Equation 3:
V OUT VREF 1) R1 R2
(3)
Where:
* VREF = 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-A divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended design procedure is to choose R2 = 30.1 k to set the divider current at 50 A, C1 = 15 pF for stability, and then calculate R1 using Equation 4: V OUT R1 R2 Vref ) 1
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages >1.8 V, the approximate value of this capacitor can be calculated as shown in Equation 5: (3 x 10)7) x (R 1 R 2) C1 (R 1 x R2) (5) The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum recommended output capacitor is 4.7 F instead of 2.2 F.
10
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TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
APPLICATION INFORMATION (continued)
OUTPUT VOLTAGE PROGRAMMING GUIDE
VIN 1 F IN EN NR 0.01 F GND FB R2 OUT TPS793xx VOUT R1 C1 1 F
OUTPUT VOLTAGE 1.22 V 2.5 V 3.3 V 3.6 V
R1 short
R2 open
C1 0 pF 22 pF 15 pF 15 pF
31.6 k 30.1 k 51 k 30.1 k 59 k 30.1 k
Figure 23. TPS79301 Adjustable LDO Regulator Programming
Regulator Protection
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device. If the temperature of the device exceeds approximately 165C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140C, regulator operation resumes.
11
TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348H - JULY 2001 - REVISED OCTOBER 2004
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TPS793xxYEQ NanoStarTM Wafer Chip Scale Information
0,79 0,84
1,30 1,34
0.625 Max
NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. NanoStarTM package configuration. D. This package is tin-lead (SnPb); consult the factory for availability of lead-free material. NanoStar is a trademark of Texas Instruments.
Figure 24. NanoStarTM Wafer Chip Scale Package
12
PACKAGE OPTION ADDENDUM
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28-Feb-2005
PACKAGING INFORMATION
Orderable Device TPS79301DBVR TPS79301DBVRG4 TPS79318DBVR TPS79318DBVRG4 TPS79318DBVT TPS79318YEQR TPS79318YEQT TPS79325DBVR TPS79325DBVRG4 TPS79325YEQR TPS79325YEQT TPS793285DBVR TPS793285DBVRG4 TPS793285DBVT TPS793285YEQR TPS793285YEQT TPS79328DBVR TPS79328DBVRG4 TPS79328YEQR TPS79328YEQT TPS79330DBVR TPS79330DBVRG4 TPS79330YEQR TPS79330YEQT TPS79333DBVR TPS79333DBVRG4 TPS793475DBVR TPS793475DBVRG4
(1)
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 DSBGA DSBGA SOT-23 SOT-23 DSBGA DSBGA SOT-23 SOT-23 SOT-23 DSBGA DSBGA SOT-23 SOT-23 DSBGA DSBGA SOT-23 SOT-23 DSBGA DSBGA SOT-23 SOT-23 SOT-23 SOT-23
Package Drawing DBV DBV DBV DBV DBV YEQ YEQ DBV DBV YEQ YEQ DBV DBV DBV YEQ YEQ DBV DBV YEQ YEQ DBV DBV YEQ YEQ DBV DBV DBV DBV
Pins Package Eco Plan (2) Qty 6 6 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 250 3000 250 250 3000 250 3000 Green (RoHS & no Sb/Br) 3000 None 3000 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) None None
Lead/Ball Finish CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI CU NIPDAU CU NIPDAU Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI CU NIPDAU CU NIPDAU Call TI Call TI CU NIPDAU CU NIPDAU Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
MSL Peak Temp (3) Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 250 None None
3000 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) None None
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 250 None None
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 250 None None
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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